Anish Athalye - Want Strong Isolation? Just Reset Your Processor
Proposes processor reset as an isolation primitive to provide stronger guarantees than cache flush-based mitigation of microarchitectural side channels.
Summary
Processor Reset as an Isolation Primitive
Anish Athalye (PhD student, MIT CSAIL) presents IORR (Isolation via Processor Reset), a research proposal for achieving strong security isolation in shared-processor environments by resetting processor microarchitectural state between security domains.
Microarchitectural Side Channel Background
Spectre and Meltdown revealed that shared microarchitectural state (caches, branch predictors, TLBs) leaks information between isolation domains in shared systems. Software mitigations (KPTI, Retpoline) impose significant performance overhead and remain incomplete.
Reset as a Clean Slate
The IORR architecture partitions execution into epochs, performing a lightweight processor reset (microarchitectural state flush without a full power cycle) when switching between security domains. This provides cryptographic-quality isolation guarantees equivalent to running on separate physical processors.
Performance Analysis
Athalye presents empirical performance measurements of IORR on RISC-V prototype hardware, demonstrating that hardware-assisted epoch switching adds only microseconds of overhead — comparable to OS context switch costs — while providing stronger isolation than current software mitigations.
Related talks
Black Hat·48 min
Analysts investigate attack surfaces and defenses concerning SGX Secure Enclaves in Practice: Security and Crypto Review.
BSides Canberra·44 min
Qian Ge
Qian Ge details "How much can commodity hardware help on closing microarchitecture timing channels?".
BSides Canberra·43 min
Yuval Yarom
Industry experts analyze emerging threats surrounding Yuval Yarom "Spectre and Meltdown: Speculative Execution Considered Harmful".